In an attempt to find an optimal processing architecture for radar signal processing applications, the different algorithms that are typically used in a pulse-Doppler radar signal processor are investigated. Radar algorithms are broken down into mathematical operations and the relative processing requirements of each operation is determined. Implementation alternatives for the operations with the highest relative processing requirements are briefly discussed for an FPGA based soft-core architecture.
Reference:
Broich, R and Grobler, H. Analysis of the computational requirements of a pulse-doppler radar signal processor. 2012 IEEE Radar Conference, Atlanta, Georgia, USA, 7-11 May 2012, pp 0835-0840
Broich, R., & Grobler, H. (2012). Analysis of the computational requirements of a pulse-doppler radar signal processor. IEEE. http://hdl.handle.net/10204/6008
Broich, R, and H Grobler. "Analysis of the computational requirements of a pulse-doppler radar signal processor." (2012): http://hdl.handle.net/10204/6008
Broich R, Grobler H, Analysis of the computational requirements of a pulse-doppler radar signal processor; IEEE; 2012. http://hdl.handle.net/10204/6008 .
Copyright: 2012 IEEE. This is the post-print version of the paper. Reprinted, with permission, from Broich, R and Grobler, H. Analysis of the computational requirements of a pulse-doppler radar signal processor. 2012 IEEE Radar Conference, Atlanta, Georgia, USA, 7-11 May 2012, pp 0835-0840.
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