Tsague, HDTwala, B2016-04-222016-04-222015-11Tsague, H.D and Twala, B. 2015. Leakage current minimisation and power reduction techniques using sub-threshold design. The International Conference on Information Society (i-Society), 9-11 November 2015, London, United Kingdomhttp://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7366877http://hdl.handle.net/10204/8517The International Conference on Information Society (i-Society), 9-11 November 2015, London, United Kingdom. Due to copyright restrictions, the attached PDF file only contains the abstract of the full text item. For access to the full text item, please consult the publisher's websiteLow power IC solutions are in great demand with the rapid advancement of handheld devices, wearables, smart cards and radio frequency identification bringing a massive amount of new products to market that all have the same primary need: Powering the device as long as possible between the need to recharge the batteries while at the same time dramatically decreasing the device leakage currents. The use of sub-threshold techniques can be a powerful way to create circuits that consume dramatically less energy than those built using standard design practices. In this research, a SOI device was built to compare their electrical characteristics using Silvaco software. The comparisons were focused on three main electrical characteristics that are threshold voltage, sub-threshold voltage and leakage current. It was found that SOI devices are ideal candidates for low power operation.enPower dissipationWeak inversionUltra-low-powerLeakage currentsPower analysisLeakage current minimisation and power reduction techniques using sub-threshold designConference PresentationTsague, H., & Twala, B. (2015). Leakage current minimisation and power reduction techniques using sub-threshold design. IEEE. http://hdl.handle.net/10204/8517Tsague, HD, and B Twala. "Leakage current minimisation and power reduction techniques using sub-threshold design." (2015): http://hdl.handle.net/10204/8517Tsague H, Twala B, Leakage current minimisation and power reduction techniques using sub-threshold design; IEEE; 2015. http://hdl.handle.net/10204/8517 .TY - Conference Presentation AU - Tsague, HD AU - Twala, B AB - Low power IC solutions are in great demand with the rapid advancement of handheld devices, wearables, smart cards and radio frequency identification bringing a massive amount of new products to market that all have the same primary need: Powering the device as long as possible between the need to recharge the batteries while at the same time dramatically decreasing the device leakage currents. The use of sub-threshold techniques can be a powerful way to create circuits that consume dramatically less energy than those built using standard design practices. In this research, a SOI device was built to compare their electrical characteristics using Silvaco software. The comparisons were focused on three main electrical characteristics that are threshold voltage, sub-threshold voltage and leakage current. It was found that SOI devices are ideal candidates for low power operation. DA - 2015-11 DB - ResearchSpace DP - CSIR KW - Power dissipation KW - Weak inversion KW - Ultra-low-power KW - Leakage currents KW - Power analysis LK - https://researchspace.csir.co.za PY - 2015 T1 - Leakage current minimisation and power reduction techniques using sub-threshold design TI - Leakage current minimisation and power reduction techniques using sub-threshold design UR - http://hdl.handle.net/10204/8517 ER -