This paper describes the development and testing of a digital radio frequency memory (DRFM) kernel, as well as some of the functionality which has been added to the system to make it a fully-fledged hardware in the loop (HIL) radar environment simulator (RES) system for radar testing and evaluation.
Reference:
Strydom, JJ, Cilliers, JE, Gouws, M, Naicker, D and Olivier, K. Hardware in the loop radar environment simulation on wideband DRFM platforms. IET Radar Conference, Glasgow, United Kingdom, 23-25 October 2012
Strydom, J., Cilliers, J. E., Gouws, M., Naicker, D., & Olivier, K. (2012). Hardware in the loop radar environment simulation on wideband DRFM platforms. The Institution of Engineering and Technology (IET). http://hdl.handle.net/10204/6378
Strydom, JJ, Jacques E Cilliers, M Gouws, D Naicker, and K Olivier. "Hardware in the loop radar environment simulation on wideband DRFM platforms." (2012): http://hdl.handle.net/10204/6378
Strydom J, Cilliers JE, Gouws M, Naicker D, Olivier K, Hardware in the loop radar environment simulation on wideband DRFM platforms; The Institution of Engineering and Technology (IET); 2012. http://hdl.handle.net/10204/6378 .