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Scaling ion traps for quantum computing

Author: Uys, H ; Amini, JM ; Wesenberg, JH ; Seidelin, S ; Britton, J ; Bollinger, JJ ; Leibfried, D ; Ospelkaus, C ; Van Deventer, AP ; Wineland, DJ Date: Sep 2010 The design, fabrication and preliminary testing of a chipscale, multi-zone, surface electrode ion trap is reported. The modular design and fabrication techniques used are anticipated to advance scalability of ion trap quantum computing architectures Read more

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Browsing by Subject "Computing architectures"

Browsing by Subject "Computing architectures"

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